1. Field of the Invention
The invention relates to a display device, and more particularly to a liquid crystal display device.
2. Description of the Related Art
Liquid crystal displays (LCD) have become widely used, with a working principle based on alignment condition of liquid crystal molecules changing by application of an electrical field so as to change the path of light passing therethrough. Typically, an LCD includes two opposite substrates with a gap therebetween receiving liquid crystal. Both substrates are formed with electrodes to control orientation and arrangement of liquid crystals. Images are displayed on the LCD panel by controlling orientation of liquid crystals with electrical field, in which bright dots or dark dots are generated where the light passes or is blocked.
LCDs, however, present several disadvantages and limitations, among narrow view angle. At present, a number of propositions for manufacturing wide view angle LCD are in the developing stage. The most widely adopted technique is the so-called multi-domain vertical alignment (MVA) technology. The alternately positioned slit-spacing-protrusion structure in each pixel is used and a single pixel is divided into several domains so that liquid crystal molecules in different domains have different tilt directions. Hence, view angle of the LCD is increased.
FIG. 1A shows a plan view of pixel structure of a conventional multi-domain vertical alignment liquid crystal display. FIG. 1B is a cross section along line I-I′ of FIG. 1A. Referring to FIG. 1A and FIG. 1B, a pixel 102 comprises a plurality of domains, such as a first domain 104, and a second domain 106 and a third domain 108, wherein the pixel 102 has a pixel electrode that comprises a plurality of domain electrodes. A thin film transistor 110 and a storage capacitor Cst 134 are arranged in the first domain 104. In the first domain 104, a polysilicon layer 114 is formed on a array substrate 100. A gate insulating layer 116 is formed on a portion of the polysilicon layer 114 (In order to simplify the diagram, the gate insulating layer 116 is not shown in FIG. 1a). A first gate line 118 and a second gate line 120 pass on the gate insulating layer 116. A first channel 151 is disposed underlying the first gate line 118 and in the polysilicon layer 114. A first source 153 and a first drain 155 are disposed on opposite sides of the first channel 151. A second channel 157 is disposed underlying the second gate line 120 and in the polysilicon layer 114. A second source 159 and a second drain 161 are disposed on opposite sides of the second channel 157.
The gate lines 118 and 120 and the polysilicon layer 114 are covered by an interlayer dielectric layer 122. A data line 124 and a drain electrode 128 of are formed on the interlayer dielectric layer 122, in which the data line 124 and the drain electrode 128 electrically connect the polysilicon layer 114. The data line 124 and the drain electrode 128 are covered by a planarization layer 130. A domain electrodes 132 (a part of the pixel electrode) is formed on the planarization layer 130, in which the domain electrodes 132 electrically connects the drain electrode 128 of the thin film transistor 110. The storage capacitor Cst 134 comprises the polysilicon layer 114, the gate insulating layer 116 and a first metal layer 119.
In a transflective liquid crystal display, a reflective layer 112 is formed on the domain electrode 132, substantially overlapping the storage capacitor Cst 134. In conventional technology, the domains 104, 106 and 108 are connected by a thin ITO neck 140 therebetween. The ITO neck 140 cannot be too wide to avoid affecting performance of the liquid crystal display. The reflective layer 112, however, is likely to react with the domain electrode 132 thereunder, such that the reacted ITO neck 140 is easily cracked to generate dots, and the domains cannot have the same voltage level.